Press releases:
Toric appoints Ian Walsh as VP of Business Development
London, UK - March 24, 2008 – Toric Limited, a London-based semiconductor IP
licensing company specialising in jitter suppression and high-speed clock generation
technology has appointed Ian Walsh as VP of Business Development.
Ian’s responsibilities include worldwide sales and business development for Toric’s
PhaseFilter and Multi-Clock Generator (MCG) products that are based on the company’s
patented Anti-Jitter Cell (AJC).
Ian brings extensive experience in licensing semiconductor technology and communications
software to the global semiconductor and OEM markets and in building and managing
international sales and support channels.
“We are very pleased that Ian will be taking our products to the global market and that we will
be benefiting from his experience in the semiconductor industry and IP licensing,” said
Professor Mike Underhill, Founder and Chairman of Toric. “We are now actively looking for
any analogue, mixed-signal or digital chip design starts where we can offer cost saving,
power reduction and power management benefits around high-speed PLLs and multiple clock
domain SoCs.”
“Toric is a very exciting company whose products are so impressive, I’m sure they’ll change
how on-chip clocking and power management will be done in the future," said Ian Walsh.
“The PhaseFilter can either replace or greatly improve PLLs in mobile and wireless baseband
chips, as a lower cost and lower power alternative. The Multi-Clock Generator on the other
hand, is deterministic and eliminates the need for distributed PLLs in SoCs with multiple clock
domains and enables a level of dynamic power management that simply isn’t possible with
today’s PLL based methods.”
Ian was formerly: CEO of Paris-based MnD Semiconductors, a multiprocessor SoC company
specialising in broadband and MPEG-4/H.264 Advanced Video Codecs that was acquired by
DxO Labs in 2007; Founder and CEO of DIVA Communications Technology Ltd, a
communications software licensing company acquired by Alcatel Microelectronics in 1999. He
also worked for Fairchild Semiconductor and held executive management positions at MIPS
Technologies, Alcatel Microelectronics, Rockwell Semiconductors and the VoIP and
broadband OEM, Westell Ltd.
Ian holds an MSc in Electrical & Electronic Engineering from Portsmouth Polytechnic.
For more information on Toric, see www.toric.co.uk
Contacts:
Nigel Robson, Vortex PR
nigel@vortex.com
Tel: +44 (0)1481 233080
Mob: +44 (0)7766 705866
Peter Hicks, Toric Limited
Tel: +44 (0)20 7193 2841
Mob: +44 (0)7785 111213
Fujitsu Chip Validates Toric's Jitter Suppression Technology
AJC technology gives enhanced performance with reduced system power and silicon area
Nice, France; Maidenhead & London, UK, 17th April, 2007 — Fujitsu Microelectronics Europe (FME), a leading supplier of low power, mixed signal integrated circuits (ICs), and Toric Limited, a London-based technology licensing company and the supplier of PhaseFilter™, today announce the results of their collaboration to verify embedded jitter-suppressing macros based on Toric's patented AJC (Anti-Jitter Cell) technology.
AJC technology provides the foundation for Toric's first product, ‘PhaseFilter' a low-power, on-chip circuit for the suppression of jitter in clock signals. The design uses only generic building blocks and so can readily be implemented in a wide range of semiconductor technologies. On a typical advanced mixed-signal CMOS process, with an operating frequency in excess of 1GHz, macros with a 2:1 tracking range and -150dBc/Hz plateau noise (far from carrier) are achievable.
PhaseFilter can enhance the performance of ICs in a wide range of applications including RF (LO) synthesis, serial communications, low-power PLLs and digital audio. Direct benefits include reduced system power and silicon area. Equally important is the potential for lower bill of material (BoM) costs and shorter development cycles, both of which enable significant reduction in total solution cost compared with conventional jitter suppression techniques.
Professor Mike Underhill, Toric's Research Director, said: "These impressive results confirm the efficacy of our technology in such applications as low power PLLs and fast high-resolution data converters. Since these areas are central to FME's 'right-sized solutions strategy' we are pleased that their faith in our technology has been rewarded by such a positive result."
FME's latest test chip, implemented in 90nm technology, demonstrates jitter suppression of 6:1 at 500MHz.
Neil Amos, Senior Director Engineering at Fujitsu Microelectronics Europe, added: "This implementation of Toric's AJC technology is a key milestone in FME's plans to deliver real customer benefits through the integration of PhaseFilter in future mixed-signal products".
A PhaseFilter Developers' Pack is available from Toric. The reference design and simulation tools enable designers to incorporate Toric's AJC technology into their own products by creating, optimising and verifying embedded macros for jitter suppression which deliver high performance, with low power and are area-efficient.